Sfoglia per Serie LECTURE NOTES IN ELECTRICAL ENGINEERING
BASIC32: A New ASIC for Silicon Photomultiplier Detectors
2014-01-01 Ciciriello, Fabio; Corsi, Francesco; Licciulli, Francesco; Marzocca, Cristoforo; Matarrese, Gianvito; DEL GUERRA, Alberto; Bisogni, MARIA GIUSEPPINA
Characterization and testing of a double axis scanning micromirror
2010-01-01 Battini, F.; Volpi, E.; Marchetti, E.; Cecchini, T.; Sechi, F.; Fanucci, Luca; De Marinis, M.; Hofmann, U.
A Clinical Tool for Prognosis and Speech Rehabilitation in Dysarthric Patients: The DESIRE Project
2023-01-01 Donati, Massimiliano; Bechini, Alessio; D’Anna, Clelia; Fattori, Bruno; Marini, Marco; Olivelli, Martina; Pelagatti, Susanna; Ricci, Giulia; Schirinzi, Erika; Siciliano, Gabriele; Tavosanis, Mirko; Torri, Francesca; Vanello, Nicola; Fanucci, Luca
Compact low noise interfaces for multichannel MEMS thermal sensors
2012-01-01 Bruschi, Paolo; Butti, Federico; Piotto, Massimo
A compact low-offset instrumentation amplifier with wide input and output ranges
2018-01-01 Piotto, Massimo; Del Cesta, Simone; Argenio, Giovanni; Simmarano, Roberto; Bruschi, Paolo
Comparison of Lithium-Ion Battery SoC Estimation Accuracy of LSTM Neural Network Trained with Experimental and Synthetic Datasets
2024-01-01 Hattouti, L. A.; Di Rienzo, R.; Nicodemo, N.; Verani, A.; Baronti, F.; Roncella, R.; Saletti, R.
Coverage-driven Verification of HDL IP cores
2011-01-01 Saponara, Sergio; Vitullo, F; Petri, Esa; Fanucci, Luca; Coppola, M; Locatelli, R.
Coverage-driven verification of HDL IP cores : Case study of a router for network-on-chip communication in embedded systems
2011-01-01 Saponara, Sergio; Vitullo, F; Petri, Esa; Fanucci, Luca; Coppola, M; Locatelli, R.
Creation of a Digital Twin Model, Redesign of Plant Structure and New Fuzzy Logic Controller for the Cooling System of a Railway Locomotive
2021-01-01 Poce, M.; Casiello, G.; Ferrari, L.; Dei, L. F. N.; Saponara, S.
CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes
2022-01-01 Nannipieri, P.; Baldanzi, L.; Crocetti, L.; Di Matteo, S.; Falaschi, F.; Fanucci, L.; Saponara, S.
Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative
2024-01-01 Nannipieri, Pietro; DI MATTEO, Stefano; Crocetti, Luca; Zulberti, Luca; Fanucci, Luca; Saponara, Sergio
DC-link capacitor sizing method for a wireless power transfer circuit to be used in drone opportunity charging
2020-01-01 Carloni, Andrea; Baronti, Federico; DI RIENZO, Roberto; Roncella, Roberto; Saletti, Roberto
Design and Analysis of RF/High-Speed SERDES in 28 nm CMOS Technology for Aerospace Applications
2021-01-01 Cosimi, F.; Ciarpi, G.; Saponara, S.
Design and FPGA Synthesis of BAN Processing Unit for Non-Archimedean Number Crunching
2023-01-01 Rossi, F.; Fiaschi, L.; Cococcioni, M.; Saponara, S.
Design and Implementation of an FPGA-Based CNN Hardware Accelerator Using Partial Reconfigurability: The CloudScout Case Study
2022-01-01 Comino, C.; Pacini, T.; Rapuano, E.; Fanucci, L.
Design of a SpaceFibre High-Speed Satellite Interface ASIC
2020-01-01 Nannipieri, P.; Dinelli, G.; Dello Sterpaio, L.; Marino, A.; Fanucci, L.
Design of an Electronic Oscillator Based on an On-Chip MEMS Resonator Aimed at Sensing Applications
2012-01-01 Pieri, Francesco; Russino, V; Bruschi, Paolo
Design of V2X Communications Based on 5G NR: A Physical Layer Perspective
2022-01-01 Sapienza, Fabiola; Lottici, Vincenzo; Giannetti, Filippo; Saponara, Sergio
Digital Random Number Generator Hardware Accelerator IP-Core for Security Applications
2020-01-01 Baldanzi, L.; Crocetti, L.; Falaschi, F.; Belli, J.; Fanucci, L.; Saponara, S.
Empowering Deafblind Communication Capabilities by Means of AI-Based Body Parts Tracking and Remotely Controlled Robotic Arm for Sign Language Speakers
2020-01-01 Panicacci, S.; Giuffrida, G.; Baldanzi, L.; Massari, L.; Terruso, G.; Zalteri, M.; Filosa, M.; Tonietti, G.; Oddo, C. M.; Fanucci, L.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| BASIC32: A New ASIC for Silicon Photomultiplier Detectors | 1-gen-2014 | Ciciriello, Fabio; Corsi, Francesco; Licciulli, Francesco; Marzocca, Cristoforo; Matarrese, Gianvito; DEL GUERRA, Alberto; Bisogni, MARIA GIUSEPPINA | |
| Characterization and testing of a double axis scanning micromirror | 1-gen-2010 | Battini, F.; Volpi, E.; Marchetti, E.; Cecchini, T.; Sechi, F.; Fanucci, Luca; De Marinis, M.; Hofmann, U. | |
| A Clinical Tool for Prognosis and Speech Rehabilitation in Dysarthric Patients: The DESIRE Project | 1-gen-2023 | Donati, Massimiliano; Bechini, Alessio; D’Anna, Clelia; Fattori, Bruno; Marini, Marco; Olivelli, Martina; Pelagatti, Susanna; Ricci, Giulia; Schirinzi, Erika; Siciliano, Gabriele; Tavosanis, Mirko; Torri, Francesca; Vanello, Nicola; Fanucci, Luca | |
| Compact low noise interfaces for multichannel MEMS thermal sensors | 1-gen-2012 | Bruschi, Paolo; Butti, Federico; Piotto, Massimo | |
| A compact low-offset instrumentation amplifier with wide input and output ranges | 1-gen-2018 | Piotto, Massimo; Del Cesta, Simone; Argenio, Giovanni; Simmarano, Roberto; Bruschi, Paolo | |
| Comparison of Lithium-Ion Battery SoC Estimation Accuracy of LSTM Neural Network Trained with Experimental and Synthetic Datasets | 1-gen-2024 | Hattouti, L. A.; Di Rienzo, R.; Nicodemo, N.; Verani, A.; Baronti, F.; Roncella, R.; Saletti, R. | |
| Coverage-driven Verification of HDL IP cores | 1-gen-2011 | Saponara, Sergio; Vitullo, F; Petri, Esa; Fanucci, Luca; Coppola, M; Locatelli, R. | |
| Coverage-driven verification of HDL IP cores : Case study of a router for network-on-chip communication in embedded systems | 1-gen-2011 | Saponara, Sergio; Vitullo, F; Petri, Esa; Fanucci, Luca; Coppola, M; Locatelli, R. | |
| Creation of a Digital Twin Model, Redesign of Plant Structure and New Fuzzy Logic Controller for the Cooling System of a Railway Locomotive | 1-gen-2021 | Poce, M.; Casiello, G.; Ferrari, L.; Dei, L. F. N.; Saponara, S. | |
| CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes | 1-gen-2022 | Nannipieri, P.; Baldanzi, L.; Crocetti, L.; Di Matteo, S.; Falaschi, F.; Fanucci, L.; Saponara, S. | |
| Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative | 1-gen-2024 | Nannipieri, Pietro; DI MATTEO, Stefano; Crocetti, Luca; Zulberti, Luca; Fanucci, Luca; Saponara, Sergio | |
| DC-link capacitor sizing method for a wireless power transfer circuit to be used in drone opportunity charging | 1-gen-2020 | Carloni, Andrea; Baronti, Federico; DI RIENZO, Roberto; Roncella, Roberto; Saletti, Roberto | |
| Design and Analysis of RF/High-Speed SERDES in 28 nm CMOS Technology for Aerospace Applications | 1-gen-2021 | Cosimi, F.; Ciarpi, G.; Saponara, S. | |
| Design and FPGA Synthesis of BAN Processing Unit for Non-Archimedean Number Crunching | 1-gen-2023 | Rossi, F.; Fiaschi, L.; Cococcioni, M.; Saponara, S. | |
| Design and Implementation of an FPGA-Based CNN Hardware Accelerator Using Partial Reconfigurability: The CloudScout Case Study | 1-gen-2022 | Comino, C.; Pacini, T.; Rapuano, E.; Fanucci, L. | |
| Design of a SpaceFibre High-Speed Satellite Interface ASIC | 1-gen-2020 | Nannipieri, P.; Dinelli, G.; Dello Sterpaio, L.; Marino, A.; Fanucci, L. | |
| Design of an Electronic Oscillator Based on an On-Chip MEMS Resonator Aimed at Sensing Applications | 1-gen-2012 | Pieri, Francesco; Russino, V; Bruschi, Paolo | |
| Design of V2X Communications Based on 5G NR: A Physical Layer Perspective | 1-gen-2022 | Sapienza, Fabiola; Lottici, Vincenzo; Giannetti, Filippo; Saponara, Sergio | |
| Digital Random Number Generator Hardware Accelerator IP-Core for Security Applications | 1-gen-2020 | Baldanzi, L.; Crocetti, L.; Falaschi, F.; Belli, J.; Fanucci, L.; Saponara, S. | |
| Empowering Deafblind Communication Capabilities by Means of AI-Based Body Parts Tracking and Remotely Controlled Robotic Arm for Sign Language Speakers | 1-gen-2020 | Panicacci, S.; Giuffrida, G.; Baldanzi, L.; Massari, L.; Terruso, G.; Zalteri, M.; Filosa, M.; Tonietti, G.; Oddo, C. M.; Fanucci, L. |
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